DESIGN LEAD RTL DDR jobs in UNITED STATES, United Kingdom

Position: Design Lead (RTL) - DDR IP (Einfochips) Job Description: What You'll Be Doing: Lead the development.... Oversee verification processes for DDR IP development Candidate will be using: RTL Compiler Design Compiler ASIC...

Arrow Electronics

Position: Design Lead (RTL) - DDR IP (Einfochips) Job Description: What You'll Be Doing: Lead the development.... Oversee verification processes for DDR IP development Candidate will be using: RTL Compiler Design Compiler ASIC...

Arrow Electronics

-level design and RTL style logic design are blended into the same product, and most of the DDR or LPDDR design is based... how the world uses information to enrich life. As an HBM Memory Lead Design Engineer in our DRAM and Emerging Memory Group...

Micron

. We are looking for a Senior Director Design Verification to work in the dynamic Microsoft Artificial Intelligence System on Chip (AISiE) Silicon... and beyond. Responsibilities: Own or lead verification of complex flows at the System on Chip (SOC), subsystem, or IP levels Organizational...

Microsoft

, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. Your Team, Your Impact Marvell’s Compute and Custom... the most difficult design problems in the areas of AI, wired and wireless communications, and other infrastructure...

Marvell

. Furthermore, "high bandwidth"; is an outstanding memory design area where custom gate-level design and RTL style logic design... are blended into the same product, and most of the DDR or LPDDR design is based on the gate-level design only. Lastly...

Micron

, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. Your Team, Your Impact Infrastructure Processor Business... verify that each design meets our customers’ specifications whether they’re a major telecom organization or automotive...

Marvell

with Architecture, IP design, Physical Design, SoC, Platform, Product, and other engineering teams to productize best-in-class HBM (high... bandwidth memory)/DDR/LPDDR memory interface IP on silicon. THE PERSON: A successful candidate will work with senior silicon...

Advanced Micro Devices

. Create design flows and methodologies. Provide customer specific design assistance. Support RTL-to-GDSII implementation... either in SOC-level Architecture or SOC RTL development or as SOC Chip lead Strong in SOC system architecture knowledge...

Synopsys

faster and more cost-effectively. Our innovative products and solutions help engineers conquer design challenges in the... increasingly complex worlds of board and chip design. We have a unique company culture. With its corporate headquarters in...

Siemens

ATPG, memory BIST, design verification, JTAG/ICL/PDL, functional test, high-speed IO, DDR, multi-chiplet designs..., above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. Your Team, Your Impact The Custom and Compute Business Unit...

Marvell

with various DFT activities. One activity is design verification of DFT IP inserted at RTL level. This verification effort is UVM... this role you will be exposed to: UVM test case development when new DFT RTL is introduced into the design.Opportunity...

Marvell

all with the world's most advanced technologies for chip design and software security. If you share our passion for innovation... and SoC Design, we want to meet you. Senior Manager/ Technical Leader of SOC Verification In this role you'll...

Synopsys